Glossary Entry

Tensor Processing Unit

Google's custom AI accelerator, built around large compiler-scheduled systolic arrays and connected into pods of thousands of chips via a switchless torus network.

Hardware

Also called: TPU, TPUs, systolic array

Seed source: Google Cloud TPU documentation

A TPU concentrates its arithmetic in a few enormous matrix units (systolic arrays, grids of multiply-accumulate cells that data flows through in a fixed rhythm) rather than the many small independently scheduled cores of a GPU. The compiler plans every data movement in advance, trading flexibility for density and predictability on dense matrix workloads.

TPUs connect to their nearest neighbours in a 2D or 3D torus with no switches in between, scaling to pods of roughly nine thousand chips that software can treat as one machine. Gemini models are trained and served on TPU fleets, making it the main production alternative to NVIDIA GPUs for frontier-scale work.